PST731xx_1.2_20100610

󰂄 General Description

The PST731xx family of low-dropout (LDO), low-power linear regulators offers very high power supply rejection ratio (PSRR) while maintaining very low

• • • • Thermal Shutdown Protection 5kV HBM ESD Protection

Ambient Temperature Range: -40ºc To 85°C TSOT23-5, SOT23-5,SC70-5, and DFN package

35μA ground current. The family uses an advanced CMOS process and a PMOSFET pass device to

achieve fast start-up, very low noise, excellent transient 󰂄 Applications

response, and excellent PSRR performance. The • Smart Phones and Cellular Phones PST731xx is stable with a 1.0μF ceramic output • PDAs capacitor, and uses a precision voltage reference and • MP3/MP4 Player feedback loop to achieve a worst-case accuracy of 3% • Digital Still Cameras over all load, line, process, and temperature variations. • Portable instruments

It is fully specified from TJ = –40°C to +125°C and is

offered in a small TSOT23-5 package, a tiny SC70-5 󰂄 Pin Configuration

package, and a ultra-small 2mm × 2mm DFN package with a thermal pad, which are ideal for small form factor

portable equipment such as wireless handsets and TSOT23-5 PDAs. (Top View)

The PST731xx is available in standard fixed output voltages of 1.2V (PST73112), 1.5V (PST73115), 1.8V (PST73118), 2.5V (PST73125), 2.8 (PST73128), 3.0V (PST73130), 3.3V (PST73133), and custom voltage options (50mV step options between 0.8V and 5.0V are available upon request).

󰂄 Features

SC70-5 • Wide Input Voltage Range: 2.5V to 6.0V (Top View) • Up to 300mA Load Current

• Standard Fixed Output Voltage Options: 1.2V, 1.5V, 1.8V, 2.5V, 2.8V, 3.0V, and 3.3V

• Other Output Voltage Options Available on Request • Very Low IQ: 35µA

• Ultra Low Dropout: 190mV at 300mA Load

• Very High PSRR: 80db at 100Hz

DFN2x2-6 • Ultra Low Noise: 45uVrms at 1.2V output (Top View) • Ultra-Fast Start-Up Time: 25µs

• Excellent Load/Line Transient Response • Line Regulation: 0.03% typical • Load Regulation: 0.1% typical

• Stable With 1µF Output Capacitor and Full Load Range (0 to 300mA)

•

Short Circuit and Overcurrent Protection

󰂄 Typical Application Diagram VINVOUTINOUTPST731xx1µFEnable1µFENGND󰂄 Ordering Information

1

Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

PART NUMBER

TEMPERATURE RANGE OUTPUT VOLTAGE PACKAGE -40°C to 85°C PST731xxETV xx/10 V * TSOT23-5 -40°C to 85°C PST731xxEJV xx/10 V * SOT23-5 -40°C to 85°C PST731xxESL xx/10 V * SC70-5 -40°C to 85°C PST731xxEFG xx/10 V * DFN2x2-6

* xx is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V).

TAPE&REEL -T -T -T -T

󰂄 Block Diagram

IN

Current Limit and Thermal ShutdownOUT

EN

Gate Driver 0.8VGND

󰂄 Pin Description

Pin No.

TSOT23-5

DFN2x2-6

SC70-5

Pin Name Pin Function

Supply input pin. Must be closely decoupled to GND with a

1 3 IN 1μF or greater ceramic capacitor.

2 2 GND Ground 3 4

1 5, 6

EN NC

Enable control input, active high. Do not leave EN floating.

No connection

Output pin. Bypass a 1μF ceramic capacitor from this pin to

5 4 OUT ground.

󰂄 Absolute Maximum Rating

2 Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

Parameter

IN Voltage

Other Pin Voltage

Maximum Load Current

Junction to Ambient Thermal Resistance (θJA), TSOT23-5Junction to Ambient Thermal Resistance (θJA), DFN2x2-6Operating Junction Temperature Storage Temperature

Lead Temperature (Soldering, 10 sec) MSL Level (Note 2)

HBM (Human Body Model)

ESD Susceptibility

MM (Machine Model)

Rating Unit -0.3 to 6.5 V

-0.3 to VIN+0.3 V

500 mA

230 °C/W =130 °C/W °C =-40 to 125

-65 to 150 °C =

300 °C

Refer to shipping label

5 kV 400 V

󰂄 Electrical Characteristics =

(VIN= VEN =3.6V, TA = 25°C unless otherwise noted)

PARAMETER

Input Voltage Operation Range Dropout Voltage

DC Supply Quiescent Current DC Supply Shutdown Current Regulated Output Voltage Line Regulation Load Regulation

SYMBOL TEST CONDITIONS VIN VOUT ≥ 2.8V, IOUT = 300mA IQ_ON IQOFF

MIN TYP MAXUNIT

2.5 6.0 V 190 280 mV Active mode: VEN=VIN 35 50 µA VEN0V 0.01 1 µA IOUT=1mA, -40°C൑TA൑85°C

-2 2 % VOUT

Soft-start Time

Current Limit

Power Supply Rejection Ratio

ΔVOUT_Line VIN = VOUT +1V to 5.5V,

0.4 % IOUT = 10mA /VOUT

ΔVOUT_Load

IOUT from 0mA to 300mA 0.6 %

/VOUT From Enable to Power On 25 µs RLOAD=1Ω 450 600 mA

f=100Hz, COUT=1µF, IOUT20mA

PSRR

80 dB f=1kHz, COUT=1µF, IOUT20mA 70 dB f=10kHz, COUT=1µF, IOUT20mA 52 dB 10Hz to 100kHz, IOUT = 200mA,

70 µVRMSVOUT=2.8V, COUT = 1µF 10Hz to 100kHz, IOUT =

45 µVRMS200mA,VOUT=1.2V, COUT = 1µF

1.4

0.4 V V

Output Noise EN Low Threshold

EN High Threshold

EN Pin Input Current IEN 0 0.1 µA Over-temperature Shutdown °C Threshold 155 Over-temperature Shutdown °C Hysteresis 20 Note: Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization.

Note 2: Level and body temperature defined by IPC/JEDEC J-STD-020

3 Rev. 1.2

󰂄 Typical Performance Characteristics

Quiescent Current vs. Temperature

Output Voltage Change vs. Temperature

Line Regulation

4 PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

Quiescent Current vs. Input Voltage

Dropout Voltage

Load Regulation

Rev. 1.2

Power Supply Ripple Rejection vs. Frequency

Soft Start

Line Transient Response (1mA Load)

5 PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

Output Noise Voltage

LDO Enable/Disable

Line Transient Response (100mA Load)

Rev. 1.2

Load Transient Response (1mA to 60mA)

6 PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

Load Transient Response (1mA to 250mA)

Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

󰂄 Input Capacitor

A1μF ceramic capacitor is recommended to connect between VIN and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. This input capacitor must be located as close as possible to the device to assure input stability and less noise. For PCB layout, a wide copper trace is required for both VIN and GND.

󰂄 Output Capacitor

An output capacitor is required for the stability of the LDO. The recommended output capacitance is from 1μF to 2.2μF, Equivalent Series Resistance (ESR) is from 5mΩ to 100mΩ, and temperature characteristics is X7R or X5R. Higher capacitance values help to improve load/line transient response. Place output capacitor as close as possible to OUT and GND pins.

󰂄 ON/OFF Input Operation

The PST731XX is turned on by pulling up the EN pin to logic high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to IN pin to keep the regulator output on at all time.

󰂄 High PSRR and Low Noise

RF circuits such as LNA (low-noise amplifier), up/down-converter, mixer, PLL, VCO, and IF stage, require low noise and high PSRR LDOs. The temperature-compensated crystal oscillator circuit requires very high PSRR at RF power amplifier burst frequency. For instance, minimum 65dB PSRR at 217Hz is recommended for the GSM handsets.

In order to provide good audio quality, the audio power supply for hand-free, game, MP3, and multimedia applications in cellular phones, require low-noise and high PSRR at audio frequency range (20Hz-20kHz).

The PST731XX, with PSRR of 80dB at 100Hz, is suitable for most of these applications that require high PSRR and low noise.

󰂄 Ultra Fast Start-up

After enabled, the PST731XX is able to provide full power in as little as tens of microseconds, typically 25µs. This feature will help load circuitry move in and out of standby mode in real time, eventually extend battery life for mobile phones and other portable devices.

󰂄 Fast Transient Response

Fast transient response LDOs can also extend battery life. TDMA-based cell phone protocols such as Global System for Mobile Communications (GSM) have a transmit/receive duty factor of only 12.5 percent, enabling power savings by putting much of the baseband circuitry into standby mode in between transmit cycles. In baseband circuits, the load often transitions virtually instantaneously from 100µA to 100mA. To meet this load requirement, the LDO must react very quickly without a large voltage drop or overshoot — a requirement that cannot be met with conventional, general-purpose LDOs.

The PST731XX’s fast transient response from 0 to 300mA provides stable voltage supply for fast DSP and GSM chipset with fast changing load.

󰂄 Low Quiescent Current

Cellular phone baseband internal digital circuits typically operate all the time. That requires LDO stays on at all times. However, in the standby mode, the microprocessor consumes only around 100~300µA. Since the phone stays in standby for the longest percentage of time, using a 40µA quiescent current LDO, instead of 100µA, saves 60µA and can substantially extends the battery standby time.

The PST731XX, consuming only around 35µA for all input range and output loading, provides great power saving in portable and low power applications.

󰂄 Current Limit Protection

When output current at the OUT pin is higher than current limit threshold or the OUT pin is short-circuit to GND, the current limit protection will be triggered and clamp the output current to approximately 500mA to prevent over-current

7 Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

and to protect the regulator from damage due to overheating.

󰂄 Thermal Shutdown Protection

Thermal protection disables the output when the junction temperature rises to approximately +155°C, allowing the device to cool down. When the junction temperature reduces to approximately +135°C the output circuitry is enabled again. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the heat dissipation of the regulator, protecting it from damage due to overheating.

8 Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

󰂄 Marking Information

󰂄 Package Information

TSOT23-5

D e1 54 A 1EE 1231 Aeb C θL L1 Symbol

Dimensions In Millimeters Dimensions In Inches

Min Max Min Max

A 0.9 1.1 0.036 0.044 A1 0.01 0.13 0.0004 0.0052 b 0.3 0.5 0.012 0.02 C 0.09 0.2 0.0036 0.008 D 2.8 3 0.112 0.12 E 2.5 3.1 0.1 0.124 E1 1.5 1.7 0.06 0.068 L 0.2 0.55 0.008 0.022 L1 0.35 0.8 0.014 0.032 e 0.95 Bsc. 0.038 Bsc. e1 1.90 Bsc. 0.076 Bsc.

θ 0ο 10ο 0ο 10ο

9 Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

DFN2X2-6

Note: The configuration of the Pin#1 identifier is optional, but must be located within the zone indicated. Symbol

Dimensions In Millimeters Min

Max

Dimensions In Inches Min

Max

A 0.7 0.8 0.028 0.031 A1 0 0.05 0 0.002 A3 0.175 0.25 0.007 0.01 b 0.2 0.35 0.008 0.014 D 1.95 2.05 0.077 0.081 D2 1 1.45 0.039 0.057 E 1.95 2.05 0.077 0.081 E2 0.5 0.85 0.02 0.033 e 0.65 0.026 L 0.3 0.4 0.012 0.016 10 Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

SC70-5

COMMON DIMENSIONS

(UNITS OF MEASURE=MILLIMETER) SYBOL MIN NOM MAX A 0.85 - 1.05 A1 0.00 - 0.10 A2 0.80 0.90 1.00 A3 0.47 0.52 0.57 b 0.22 - 0.29 b1 0.22 0.25 0.28 c 0.115 - 0.15 c1 0.115 0.13 0.14 D 2.02 2.07 2.12 E 2.20 2.30 2.40 E1 1.25 1.30 1.35 e 0.65BSC e1 1.30BSC L 0.28 0.33 0.38 L1 0.50REF L2 1.30BSC R 0.10 - - R1 0.10 - 0.25 0° - 8° θ

θ1 6° 9° 12° θ2 6° 9° 12° 11 Rev. 1.2

PST731xxVery High PSRR Ultra-Low Noise 300mA LDO

󰂄 Packing Information

Package Type

Carrier Width (W)

PDPitch (P) Reel Size(D) 180±1 mm

WPacking Minimum

3000pcs

TSOT23-5L 8.0±0.1 mm 4.0±0.1 mm

Note: Carrier Tape Dimension, Reel Size and Packing Minimum

Note: PowerSilicon Technology Corporation assumes no responsibility for any errors which may appear in

this document. PowerSilicon Technology Corporation reserves the right to change devices or specifications detailed herein at any time without notice.

12 Rev. 1.2