专利名称:Dynamically configurable processor发明人:Jari A. Parviainen申请号:US09726188申请日:20001129公开号:US06959316B2公开日:20051025
专利附图:
摘要:A data processor, such as a DSP, includes a multiplier block having a multiplierfront end for generating partial products from input operands, and further includes aplurality of ALUs having inputs that are switchably or programmably coupled, in a firstmode of operation, to first data sources representing outputs of the multiplier front end.
In the first mode of operation the ALUs add together partial products received from themultiplier front end to arrive at a multiplication result. In a second mode of operation theinputs of the plurality of ALUs are switchably or programmably coupled to second datasources for performing at least one of arithmetic and logical operations on data receivedfrom the second data sources.
申请人:Jari A. Parviainen
地址:Jaali FI
国籍:FI
代理机构:Harrington & Smith, LLP
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