Rev 3; 3/07Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchGeneral DescriptionFeaturesThe DS3904/DS3905 contain three nonvolatile (NV) lowtemperature coefficient, variable digital resistors. Each♦Three 20kΩ, or Two 20kΩand One 10kΩ,128-Position Linear Digital Resistorsresistor has 128 user-selectable positions. Additionally,the DS3904/DS3905 have a high-impedance setting that♦Resistor Settings are Stored in NVMemoryallows each resistor to function as a digital switch. The♦Each Resistor has a High-Impedance Setting forDS3904/DS3905 can operate over a 2.7V to 5.5V supplySwitch Operation to Control Digital Logicvoltage range, and communication with the device isachieved through a 2-wire serial interface. Address pins♦Low Temperature Coefficientallow multiple DS3904/DS3905s to operate on the same♦2-Wire Serial Interfacetwo-wire bus. The DS3904 has one address pin, allow-♦2.7V to 5.5V Operating Range
ing two DS3904s to share the bus, while the DS3905has three address pins, allowing up to eight DS3905s to♦-40°C to +85°C Industrial Temperature
share a common bus. The low-cost and small size of the♦Packaging: 8-Pin µSOP for DS3904, 10-pin µSOPDS3904/DS3905 make them ideal replacements for con-for DS3905
ventional mechanical trimming resistors.
Ordering InformationPARTTEMP RANGEPIN-(R0/R1/R2) PACKAGERESISTANCE (k)ApplicationsDS3904U-010 -40°C to +85°C 8 μSOP 20/10/20 + High-Z Power-Supply CalibrationDS3904U-020 -40°C to +85°C 8 μSOP 20/20/20 + High-Z Cell Phones and PDAs
DS3905U-020 -40°C to +85°C 10 μSOP 20/20/20 + High-Z Fibre Optic Transceiver ModulesPortable Electronics
Pin ConfigurationsSmall and Low-Cost Replacement for
TOP VEIWConventional Mechanical Trimming Resistors/SDA18A0A1110A2Dip SwitchesSCLSDA27H029A0Test Equipment
VCC3DS3904SDL38H06H1VDS3905CC47H1GND45H2GND56H2μSOPμSOPTypical Operating CircuitINTERFACE EXAMPLESVCCVCCDS3904/DS39050.1μFVCCRHIZR10VARIABLE RESISTANCEFOR ADJUSTABLE RESISTOR 0H0CURRENT SOURCE4.7kΩ4.7kΩADDR F8hVCC2-WIRESCLMASTERSDARRHIZ11DIGITALLOGIC2-WIREADDRESSABLE RESISTOR 1H1SWITCH (USING 00hA0ADDR F9hAND RHIZ SETTINGS)V(DS3905 ONLY)A1INA2RHIZGAIN RESISTOR 2H2CONTROLADDR FAhGNDR12_____________________________________________Maxim Integrated Products1
For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.DS3904/DS3905元器件交易网www.cecb2b.com
Triple 128-Position Nonvolatile Variable Digital Resistor/SwitchP
P
DS3904/DS3905ABSOLUTE MAXIMUM RATINGS
Voltage on VCCPin Relative to Ground.................-0.5V to +6.0VVoltage on SDA, SCL, A0, A1, A2
Relative to Ground*...................................-0.5V to VCC+ 0.5VVoltage on H0, H1, and
H2 Relative to Ground.......................................-0.5V to +6.0VCurrent Through H0, H1, and H2..........................................3mA
Operating Temperature Range...........................-40°C to +85°CProgramming Temperature Range.........................0°C to +70°CStorage Temperature Range.............................-55°C to +125°CSoldering Temperature...................See J-STD-020 Specification
*This voltage must not exceed 6.0V.Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.RECOMMENDED DC OPERATING CONDITIONS
(TA= -40°C to +85°C)
PARAMETERSupply VoltageInput Logic 1Input Logic 0Resistor CurrentResistor Terminals H0, H1, H2SYMBOLVCCVIHVILIRVCC = +2.7V to +5.5V-0.3(Note 1)CONDITIONSMIN2.70.7 xVCC-0.3TYPMAX5.5VCC +0.30.3 xVCC3+5.5UNITSVVVmAVDC ELECTRICAL CHARACTERISTICS
(VCC= +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted.)PARAMETERInput LeakageStandby Supply CurrentLow-Level Output Voltage (SDA)SYMBOLILISTBYVOL1VOL2CONDITIONS(Note 2)VCC = 3V (Note 3)VCC = 5V (Note 3)3mA sink current6mA sink current00MIN-1TYP95145MAX+12002000.40.6UNITSµAµAVANALOG RESISTOR CHARACTERISTICS
(VCC= +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted.)ARAMETER SYMBOL CONDITIONS 20k resistorAbsolute Linearity (Note 4)INL10k resistorRelative Linearity (Note 5)Temperature Coefficient (Note 6)DNL20k resistor10k resistorPosition 7Fh (20k resistor)Position 7Fh (10k resistor)MIN TY MAX UNITS -1+1LSB-1+1-0.5-0.5-200-150+123+173+0.5+0.5+400+450LSBppm/°C2______________________________________________________________________
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchANALOG RESISTOR CHARACTERISTICS (continued)
(VCC= +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted.)ARAMETER SYMBOL CONDITIONS MIN TY MAX UNITS Position 7Fh ResistanceRT14.52025.5MAXA = +25°C (20k resistor)TA = +25°C (10k resistor)81012kPosition 00h ResistanceRMINTA = +25°C200500High ImpedanceRHIZ5.5 MAC ELECTRICAL CHARACTERISTICS
(VCC= +2.7V to +5.5V, TA= -40°C to +85°C.)PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSCL Clock FrequencyFast mode0400(Note 7)fSCLStandard mode0100kHzBus Free Time between STOPFast mode1.3and START Conditions (Note 7)tBUFStandard mode4.7µsHold Time (Repeated) STARTFast mode0.6Condition (Notes 7, 8)tHD:STAStandard mode4.0µsLow Period of SCL ClockFast mode1.3(Note 7)tLOWStandard mode4.7µsPHigh Period of SCL ClockFast mode0.6P(Note 7)tHIGHStandard mode4.0µsData Hold TimeFast mode00.9(Notes 7, 9)tHD:DATStandard mode00.9µsData Setup TimeFast mode100(Note 7)tSU:DATStandard mode250nsStart Setup TimetFast mode0.6SU:STAStandard mode4.7µsRise Time of Both SDA and SCLFast mode20 + 0.1CB300Signals (Note 10)tRStandard mode20 + 0.1CnsB1000Fall Time of Both SDA and SCLFast mode20 + 0.1CB300Signals (Note 10)tFStandard mode20 + 0.1CnsB300Setup Time for STOP ConditiontFast mode0.6SU:STOStandard mode4.0µsCapacitive Load for Each BusLineCB(Note 10)400pFEEPROM Write TimetW(Note 11)1020msStartup TimetST2ms_____________________________________________________________________3
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchDS3904/DS3905NONVOLATILE MEMORY CHARACTERISTICS
(VCC= +2.7V to +5.5V, TA= +70°C.)
PARAMETEREEPROM WritesSYMBOLCONDITIONSMIN50,000TYPMAXUNITSAll voltages are referenced to ground.Applies to A0, SDA, SCL for the DS3904 and A0, A1, A2, SDA, SCL for the DS3905. Also applies to H0, H1,H2 for both DS3904 and DS3905 when in the high-impedance state.
Note 3:ISTBYspecified with SDA = SCL = VCCand A0 = GND.
Note 4:Absolute linearity is used to determine expected resistance. Absolute linearity is defined as the deviation
from the straight line drawn from the value of the resistance at position 00h to the value of the resistance atposition 7Fh.
Note 5:Relative linearity is used to determine the change of resistance between two adjacent resistor positions.Note 6:Temperature coefficient specifies the change in resistance as a function of temperature. The temperature
coefficient varies with resistor position. Limits are guaranteed by design.
Note 7:A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT> 250ns must
then be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal.If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDAline tRMAX+ tSU:DAT= 1000ns + 250ns =1250ns before the SCL line is released.
Note 8:After this period, the first clock pulse is generated.
Note 9:The maximum tHD:DAThas only to be met if the device does not stretch the LOW period (tLOW) of the SCL
signal.
Note 10:CB—total capacitance of one bus line in picofarads, timing referenced to 0.9 x VCCand 0.1 x VCC.Note 11:EEPROM write begins after a stop condition occurs.
Note 1:Note 2:
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchTypical Operating Characteristics(VCC= +5.0V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT SUPPLY CURRENT RESISTANCE vs.vs. TEMPERATURE
vs. SCL FREQUENCY
RESISTOR SETTING
16010200225
300cccooottt V5V55CC = +5V/CC = SDA = +5V//1404440180009993ADDRESS PINS33SD160CONNECTED TO GNDSD20SD))A120Aμμ)(VCC = +3V(140 TTΩ20kΩ RESISTORkN100N(EE120 E15
RRRRCUUNC80C100AT YYSILLPP80SE10
P60PRUUSS40SDA = SCL =VCC60ADDRESS PINS 405
20CONNECTED TO GND2010kΩ RESISTOR00
0
-40
-20
0
20
40
60
80
0
50
1001502002503003504000
25
50
75
100
125
TEMPERATURE (°C)SCL FREQUENCY (kHz)
RESISTOR SETTING (DEC)
TEMPERATURE COEFFICIENT vs.
TEMPERATURE COEFFICIENT vs.
POSITION 7Fh RESISTANCE PERCENT CHANGE
RESISTOR SETTING
RESISTOR SETTING
FROM +25°C vs. TEMPERATURE
600490051.0
6000c10kΩ RESISTORccooottt 55)5)20kΩ RESISTOR/)/C4C400C/4°5009°8009°09/3/3mSmS50.810kΩ RESISTOR3DD2Spp+D p(400p700(M TTONNR0.6
E300E600F(IICC 20kΩ RESISTOREIIFFGFF500N0.4EO200TC OF +25°C TO +85°CEOTC OF +25°C TO +85°CAHCCC EE400 R100TC OF +25°C TO -40°CR%0.2UU ETTAA300CRNE0REA0PPTMM200TC OF +25°C TO -40°CSIEST-100ETE100R-0.2-200
0-0.4
0
20
40
60
80
100
120
0
20
40
60
80
100
120
-40-20020406080
RESISTOR SETTING (DEC)RESISTOR SETTING (DEC)
TEMPERATURE (°C)
POSITION 00h RESISTANCE PERCENT CHANGE
FROM +25°C vs. TEMPERATURE
RESISTANCE vs. POWER-UP VOLTAGE
RESISTANCE vs. POWER-DOWN VOLTAGE
3.5701008c0100
90octo 5t90>5.5MΩ /54>5.5MΩcot) C3.05//°04490900539922.510kΩ RESISTORS33DSS+D80D MO2.080R1.5))F(Ω70EEPROM RECALLΩ70EEPROM RECALL Ekk1.0((G NE60E60CCAH0.5NNCAA0T50T50 %SSII SSE20kΩ RESISTOR40-0.5EE40CRRNPROGRAMMED RESISTANCEA-1.03030PROGRAMMED RESISTANCETSISE-1.52020R-2.010
10-2.5
-40
-20
0
20406080
00
0
1
2
3
4
5
6
0123456
TEMPERATURE (°C)
POWER-UP VOLTAGE (V)
POWER-DOWN VOLTAGE (V)
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchDS3904/DS3905Typical Operating Characteristics (continued)(VCC= +5.0V, TA= +25°C, unless otherwise noted.)
POSITION 3Fh RESISTANCE vs.
SUPPLY VOLTAGE
DS3904/5 toc10ABSOLUTE LINEARITY vs.RESISTOR 0 POSITION
DS3904/5 toc11RELATIVE LINEARITY vs.RESISTOR 0 POSITION
0.4RELATIVE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4-0.5
RESISTOR 020kΩDS3904/5 toc1225POSITION 3Fh RESISTANCE (kΩ)0.50.4ABSOLUTE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4
RESISTOR 020kΩ0.5
20
15
20kΩ RESISTOR10
10kΩ RESISTOR5
02.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
-0.5
0
20
40
60
80
100
120
RESISTOR 0 POSITION (DEC)
020406080100120
RESISTOR 0 POSITION (DEC)
ABSOLUTE LINEARITY vs.RESISTOR 1 POSITION
DS3904/5 toc13RELATIVE LINEARITY vs.RESISTOR 1 POSITION
DS3904/5 toc14ABSOLUTE LINEARITY vs.RESISTOR 2 POSITION
0.4ABSOLUTE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4-0.5
RESISTOR 220kΩDS3904/5 toc150.50.4ABSOLUTE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4-0.5
0
20
40
60
80
100
120
RESISTOR 1 POSITION (DEC)
RESISTOR 120kΩ0.50.4RELATIVE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4-0.5
0
20
40
60
80
100
120
RESISTOR 1 POSITION (DEC)
RESISTOR 120kΩ0.5
020406080100120
RESISTOR 2 POSITION (DEC)
RELATIVE LINEARITY vs.RESISTOR 2 POSITION
DS3904/5 toc16ABSOLUTE LINEARITY vs.RESISTOR 1 POSITION
DS3904/5 toc17RELATIVE LINEARITY vs.RESISTOR 1 POSITION
0.4RELATIVE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4-0.5
RESISTOR 110kΩDS3904/5 toc180.50.4RELATIVE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4-0.5
0
20
40
60
80
100
120
RESISTOR 2 POSITION (DEC)
RESISTOR 220kΩ0.50.4ABSOLUTE LINEARITY (LSB)0.30.20.10-0.1-0.2-0.3-0.4-0.5
0
20
40
60
80
100
120
RESISTOR 1 POSITION (DEC)
RESISTOR 110kΩ0.5
020406080100120
RESISTOR 1 POSITION (DEC)
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchPin DescriptionTable 1. Variable Resistor RegistersNAMEPINDS3904DS3905DESCRIPTIONADDRESS VARIABLE POSITION 7Fh NUMBER OF RESISTOR RESISTANCE POSITIONS* SDA122-Wire Serial Data. Open-draininput/output for 2-wire data.F8hResistor 020k128 (00h to (nominal)7Fh) + Hi-Z SCL232-Wire Serial Clock. Input for2-wire clock.F9hResistor 120k or 10k128 (00h to (nominal)7Fh) + Hi-Z VCC34Supply Voltage TerminalGND45Ground TerminalFAhResistor 220k128 (00h to (nominal)7Fh) + Hi-Z H256Resistor 2 High TerminalsH167Resistor 1 High Terminals*Writing a value greater than 7Fh to any of the resistor registerssets the high-impedance mode control bit (RHIZ, the MSB ofH078Resistor 0 High Terminalsthe resistor register) resulting in the resistor going into high-A089Address-Select Pinimpedance mode. Position 0 is the minimum position. Position7Fh is the maximum position. A1—1Ad d re ss- S el ect P in ( D S3 905 Onl y) A2—10Ad d re ss- S el ect P in ( D S3 905 Onl y) Detailed DescriptionDevice OperationThe DS3904/DS3905 contain three, 128-position, NV,Clock and Data Transitionslow temperature coefficient, variable digital resistors. AllThe SDA pin is normally pulled high with an externalthree resistors also feature a Hi-Z function. The variableresistor or device. Data on the SDA pin can only changeresistor registers (F8h, F9h, and FAh) are factory pro-during SCL low time periods. Data changes during SCLgrammed with a default value of 7Fh. They are con-high periods indicate a start or stop condition depend-trolled through a 2-wire serial interface, and can serveing on the conditions discussed below. See the timingas a low-cost replacement for designs using conven-diagrams for further details (Figures 2 and 3).
tional trimming resistors. Furthermore, the DS3904address pin (A0) allows two DS3904s to be placed onStart Conditionthe same 2-wire bus. The three address pins on theA high-to-low transition of SDA with SCL high is a startDS3905 allow up to eight DS3905s to be placed on thecondition, which must precede any other command. Seesame 2-wire bus.
the timing diagrams for further details (Figures 2 and 3).
With their low cost and small size, the DS3904/DS3905Stop Conditionare well tailored to replace larger mechanical trimmingA low-to-high transition of SDA with SCL high is a stopvariable resistors. This allows the automation of calibra-condition. After a read or write sequence, the stop com-tion in many instances because the 2-wire interface canmand places the DS3904/DS3905 into a low-powereasily be adjusted by test/production equipment.
mode. See the timing diagrams for further details(Figures 2 and 3).
Variable Resistor Memory OrganizationThe variable resistors of the DS3904/DS3905 areAcknowledgeaddressed by communicating with the registers inAll address and data bytes are transmitted through aTable 1.
serial protocol. The DS3904/DS3905 pull the SDA linelow during the ninth clock pulse to acknowledge thatUsing the Resistor as a Switchthey have received each byte.
By taking advantage of the high-impedance mode, aswitch can be created to produce a digital output.Standby ModeSetting a resistor register to 00h creates the low state.The DS3904/DS3905 feature a low-power mode that isWriting 80h into the same resistor register enables theautomatically enabled after power-on, after a stop com-high-impedance state. When used with an externalmand, and after the completion of all internal operations.
pullup resistor, such as a 4.7kΩpullup, a high state is generated.
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchDS3904/DS3905VCCEEPROMVCCDS3905RHIZ CONTROLH0F8hMSBGNDRESISTOR 07LSBRES 020kΩRHIZ CONTROLSCLSDAA0A1A22-WIREINTERFACERES 120kΩOR10kΩH1DATAF9hMSBRESISTOR 17LSBwhere the data is to be written. After the byte has beenreceived, the DS3904/DS3905 transmit a zero for oneclock cycle to acknowledge that the memory addresshas been received. The master must then transmit an 8-bit data word to be written into this memory address. TheDS3904/DS3905 again transmit a zero for one clockcycle to acknowledge the receipt of the data byte. At thispoint, the master must terminate the write operation witha stop condition. The DS3904/DS3905 then enter aninternallytimed write process twto the EEPROM memo-ry. All inputs are disabled during this write cycle.
(DS3905 ONLY)Acknowledge PollingH2RHIZ CONTROLFAhMSBRESISTOR 27LSBRES 220kΩOnce a EEPROM write is initiated, the part will notacknowledge until the cycle is complete. Anotheroption is to wait the maximum write cycle delay beforeinitiating another write cycle.
Read OperationsFigure 1. DS3904/DS3905 Block DiagramBus ResetAfter any interruption in protocol, power loss, or systemreset, the following steps reset the DS3904/DS3905:1)Clock up to nine cycles.
2)Look for SDA high in each cycle while SCL is high.3)Create a start condition while SDA is high.
Device AddressingThe DS3904/DS3905 must receive an 8-bit deviceaddress byte following a start condition to enable aspecific device for a read or write operation. Theaddress byte is clocked into the DS3904/DS3905 MSBto LSB. For the DS3904, the address byte consists of101000 binary followed by A0 then the R/Wbit. If theR/Wbit is high, a read operation is initiated. For theDS3905, the address byte consists of 1010 binary fol-lowed by A2, A1, A0 then the R/Wbit. If the R/Wbit islow, a write operation is initiated. For a device tobecome active, the value of the address bits must bethe same as the hard-wired address pins on theDS3904/DS3905. Upon a match of written and hard-wired addresses, the DS3904/DS3905 output a zero forone clock cycle as an acknowledge. If the addressdoes not match, the DS3904/DS3905 return to a low-power mode.
After receiving a matching address byte with the R/Wbitset high, the device goes into the read mode of opera-tion. A read requires a dummy byte write sequence toload in the register address. Once the device addressand data address bytes are clocked in by the master,and acknowledged by the DS3904/ DS3905, the mastermust generate another start condition (repeated start).The master now initiates a read by sending the deviceaddress with the R/Wbit set high. The DS3904/DS3905acknowledge the device address and serially clock outthe data byte. The master responds with a NACK andgenerates a stop condition afterwards.
See Figures 4 and 5 for command and data byte struc-tures as well as read and write examples.
2-Wire Serial Port OperationThe 2-wire serial port interface supports a bidirectionaldata transmission protocol with device addressing. Adevice that sends data on the bus is defined as a trans-mitter, and a device receiving data as a receiver. Thedevice that controls the message is called a master. Thedevices that are controlled by the master are slaves. Thebus must be controlled by a master device that gener-ates the SCL, controls the bus access, and generatesthe start and stop conditions. The DS3904/DS3905 oper-ate as slaves on the 2-wire bus. Connections to the busare made through SCL and open-drain SDA lines. Thefollowing I/O terminals control the 2-wire serial port: SDA,SCL, and A0. The DS3905 uses two additional addresspins A1 and A2 to control the 2-wire serial port. Timingdiagrams for the 2-wire serial port can be found inFigures 2 and 3. Timing information for the 2-wire serialport is provided in the AC Electrical Characteristicstablefor 2-wire serial communications.
Write OperationsAfter receiving a matching device address byte with theR/Wbit set low, the device goes into the write mode ofoperation. The master must transmit an 8-bit EEPROMmemory address to the device to define the address
8
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchSDAMSBSLAVE ADDRESSR/WDIRECTIONACKNOWLEDGEMENTBITSIGNAL FROM RECEIVERACKNOWLEDGEMENTSIGNAL FROM RECEIVERSCL126789123–789STARTACKACKSTOPCONDITIONCONDITIONREPEATED IF MORE BYTESOR REPEATEDARE TRANSFERREDSTART CONDITIONFigure 2. 2-Wire Data Transfer ProtocolSDAtBUFtHD:STAtSPtLOWtRtFSCLtHD:STAtHIGHtSU:STASTOPSTARTtSU:DATREPEATEDtSU:STOSTARTtHD:DATFigure 3. 2-Wire AC CharacteristicsThe following bus protocol has been defined:
Bus Not Busy: Both data and clock lines remainData transfer can be initiated only when the bus is high.
not busy.
Start Data Transfer: A change in the state of theDuring data transfer, the data line must remain sta-data line from high to low while the clock is highble whenever the clock line is high. Changes in thedefines a start condition.
data line while the clock line is high are interpretedStop Data Transfer: A change in the state of theas control signals.
data line from low to high while the clock line isAccordingly, the following bus conditions have beenhigh defines the stop condition.
defined:
Data Valid: The state of the data line representsvalid data when, after a start condition, the data lineis stable for the duration of the high period of theclock signal. The data on the line can be changedduring the low period of the clock signal. There is
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchCOMMAND BYTEMSBSTART1010LSBA2*A1*A0R/WMSBDATA BYTELSBDEVICE IDENTIFIERSLAVEORADDRESS\"FAMILY CODE\"RHIZCONTROL BITRESISTOR SETTING*DS3904, USE 0's INSTEAD OF A2 AND A1 FOR THE DEVICE ADDRESSFigure 4. Command and Data Byte Structuresone clock pulse per bit of data. Figures 2 and 3detail how data transfer is accomplished on the 2-wire bus. Depending upon the state of the R/Wbit,two types of data transfer are possible.
Each data transfer is initiated with a start conditionand terminated with a stop condition. The numberof data bytes transferred between start and stopconditions is not limited and is determined by themaster device. The information is transferred byte-wise and each receiver acknowledges with a ninthbit.
Within the bus specifications, a regular mode(100kHz clock rate) and a fast mode (400kHz clockrate) are defined. The DS3904/DS3905 work in bothmodes.
Acknowledge: Each receiving device, whenaddressed, generates an acknowledge after thebyte has been received. The master device mustgenerate an extra clock pulse that is associatedwith this acknowledge bit.
A device that acknowledges must pull down theSDA line during the acknowledge clock pulse insuch a way that the SDA line is a stable low duringthe high period of the acknowledge-related clockpulse. Of course, setup and hold times must betaken into account. A master must signal an end ofdata to the slave by not generating an acknowl-edge bit on the last byte that has been clocked outof the slave. In this case, the slave must leave thedata line high to enable the master to generate thestop condition.
Data transfer from a master transmitter to aslave receiver.The first byte transmitted by themaster is the command/control byte. Next follows anumber of data bytes. The slave returns anacknowledge bit after each received byte.
Data transfer from a slave transmitter to a mas-ter receiver.The master transmits the first byte (thecommand/control byte) to the slave. The slave thenreturns an acknowledge bit. Next follows the databyte transmitted by the slave to the master. Themaster returns NACK followed by a stop.
The master device generates all serial clock pulsesand the start and stop conditions. A transfer isended with a stop condition or with a repeated startcondition. Since a repeated start condition is alsothe beginning of the next serial transfer, the bus isnot released.
DS3904/DS3905EXAMPLE 2-WIRE TRANSACTIONSMSBWRITE RESISTOR 0TO MIN POSITIONSTART1010A0h000LSB0FROMSLAVEACKMSB1111F8h100LSB0FROMSLAVEACKMSB000000h000LSB0FROMSLAVEACKSTOPMSBSET RESISTOR 1 TO Hi-ZSTART1010A0h000LSB0ACKMSB1111F9h100LSB1ACKMSB100080h000LSB0ACKSTOPMSBWRITE RESISTOR 2 TOMAX POSITIONSTART1010A0h000LSB0ACKMSB1111FAh101LSB0ACKMSB01117Fh111LSB1ACKSTOPMSBREAD RESISTOR 1 VALUESTART1MSB1A0 = GND FOR DS3904A0, A1, A2 = GND FOR DS3905010010A0h0A1h00000LSB0LSB1ACKACKMSB1MSB111F9h100LSB1LSBACKMASTERNACKSTOPREPEATEDSTARTRESISTOR DATAFigure 5. Example 2-Wire Transactions10_____________________________________________________________________
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Triple 128-Position Nonvolatile Digital Variable Resistor/SwitchThe DS3904/DS3905 can operate in the following threemodes:Applications Information1)
Slave Receiver Mode:Serial data and clock arePower-Supply Decouplingreceived through SDA and SCL, respectively. AfterTo achieve the best results when using the DS3904/each byte is received, an acknowledge bit is trans-DS3905, decouple the power supply with a 0.01µF ormitted. Start and stop conditions are recognized as0.1µF capacitor. Use a high-quality ceramic surface-the beginning and end of a serial transfer. Addressmount capacitor. Surface-mount components minimizerecognition is performed by hardware after thelead inductance, which improves performance, andslave (device) address and direction bit has beenceramic capacitors tend to have adequate high-fre-received.
quency response for decoupling applications.
2)
Slave Transmitter Mode:The first byte is receivedHigh Resistor Terminal Voltageand handled as in the slave receiver mode.It is possible to have a voltage on the resistor-high termi-However, in this mode the direction bit indicatesnals that is higher than the voltage connected to VCC.that the transfer direction is reversed. Serial data isFor instance, connecting VCCto 3.0V while one or moretransmitted on SDA by the DS3904/DS3905 whileof the resistor high terminals are connected to 5.0Vthe serial clock is input on SCL. Start and stop con-allows a 3V system to control a 5V system. The 5.5Vditions are recognized as the beginning and end ofmaximum still applies to the limit on the resistor high ter-a serial transfer.
minals regardless of the voltage present on VCC.
3)
Slave Address:The command/control byte is thefirst byte received following the start condition fromthe master device. The command/control byte con-Package Informationsists of a 4-bit device identifier. For the DS3904, theFor the latest package outline information, go to identifier is followed by the device-select bits 0, 0,www.maxim-ic.com/DallasPackInfo.
and A0. For the DS3905, the identifier is followed bythe device-select bits A2, A1, A0. The device identi-fier is used by the master device to select whichdevice is to be accessed. When reading or writingthe DS3904/DS3905, the device-select bits mustmatch the device-select pin(s). The last bit of thecommand/control byte (R/W) defines the operationto be performed. When set to a ‘1’, a read operationis selected, and when set to a ‘0’, a write operationis selected.
Following the start condition, the DS3904/DS3905 moni-tor the SDA bus checking the device-type identifierbeing transmitted. Upon receiving the control code, theappropriate device address bit, and the read/write bit,the slave device outputs an acknowledge signal on theSDA line.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses areimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________11©2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
is a registered trademark of Dallas Semiconductor Corporation.
DS3904/DS3905
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