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MEMORY存储芯片TMS320C6455BCTZ2中文规格书

2022-03-31 来源:易榕旅网
TMS320C6414, TMS320C6415, TMS320C6416FIXED-POINT DIGITAL SIGNAL PROCESSORS

SPRS146L − FEBRUARY 2001 − REVISED JULY 2004UTOPIA SLAVE TIMING [C6415 AND C6416 ONLY] (CONTINUED)

timing requirements for UTOPIA Slave receive (see Figure 60)

NO.

−5E0, A−5E0,−6E3, A−6E3,

−7E3MIN

12349101112

tsu(URDV-URCH)th(URCH-URDV)tsu(URAV-URCH)th(URCH-URAV)tsu(URENBL-URCH)th(URCH-URENBL)tsu(URSH-URCH)th(URCH-URSH)

Setup time, URDATA valid before URCLK highHold time, URDATA valid after URCLK highSetup time, URADDR valid before URCLK highHold time, URADDR valid after URCLK highSetup time, URENB low before URCLK highHold time, URENB low after URCLK highSetup time, URSOC high before URCLK highHold time, URSOC high after URCLK high

41414141

MAX

nsnsnsnsnsnsnsnsUNIT

switching characteristics over recommended operating conditions for UTOPIA Slave receive(see Figure 60)

NO.

PARAMETER

−5E0, A−5E0,−6E3, A−6E3,

−7E3MIN

5678

td(URCH-URCLAV)td(URCH-URCLAVL)td(URCH-URCLAVHZ)tw(URCLAVL-URCLAVHZ)

URCLK

21URDATA[7:0]

P4843URADDR[4:0]

N0x1FN+10x1F75URCLAV

N10URENB11URSOC

†The UTOPIA Slave module has signals that are middle-level signals indicating a high-impedance state (i.e., the URCLAV andURSOC signals).

129N+16N+28N+20x1FH1H2H3Delay time, URCLK high to URCLAV driven active valueDelay time, URCLK high to URCLAV driven inactive lowDelay time, URCLK high to URCLAV going Hi-ZPulse duration (low), URCLAV low to URCLAV Hi-Z

3393

MAX121218.5

nsnsnsnsUNIT

Figure 60. UTOPIA Slave Receive Timing†

MECHANICAL DATA

CLZ (S PBGA N532) PLASTIC BALL GRID ARRAY

-川m20 00 TYP

一川川0 40

000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000

00000000-00000--一---0一--

00000000000000

00000000000000

00000000000000

00000000000000

00000000000000

00000000000000

00000000000000

000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000

1 3 5 7 9 11 13 15 1 7 19 21 23 25 2 4 6 8 1口1214 16 18 20 22 24 26

AF AE AD AC AB A《

V T

p

------------

K H F D B

。寸。

LID

A1 Co「ne「

Bottom V1巳W

3,25 MAX

1 081 NOM

r

NOTES:

叫」拮|命1¢

A.

B. C. D. E.

0,15⑩

PACKAGE IDENTIFIER: CLZ 01

All line口「dimensionsare in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. This d「awingis subject to change without notice. The「mallyenh口ncedplastic package with a lid. Flip chip application only.

Pb-f「eedie bump口「1dsolde「ball.

4206995 2/C 02/11

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