High frequency programmable divider

专利名称：High frequency programmable divider发明人：Timothy L. Hillstrom申请号：US07/963303申请日：19921015公开号：US05337339A公开日：19940809

摘要：A high speed, synchronous, programmable frequency divider is disclosed. Thedivider is composed of a cascade of conventional programmable counters, each of whichreceives some portion of an externally supplied integer N, such that the divider producesone output pulse for every N periods of a supplied clock signal. Although conventionalfrequency dividers are substantially slower than the speed of their individual counters, adivider according to this invention, however, will operate at very nearly the same speed.The improved performance is achieved through (a) individually choosing the timing of theclock signal applied to each circuit of the divider, and (b) introducing a delay circuit,typically a shift register, in a feedback path. A method for determining the values of theclock timing variations and for determining an optimum number of flip-flops in the shiftregister is given. A divider according to the invention may be optimized either formaximum speed or for best design margins at a given speed.

申请人：HEWLETT-PACKARD COMPANY

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